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ADCE Packaging Design Architect

Intel

Santa Clara, CA, United States Full-time June 13, 2026
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Opportunity Description

**Job Details:**

**Job Description:**

Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design. Completes documentation and collateral into the product lifecycle management system of record.

Required Skills and Experience:

+ Self-motivated engineer who has strong technical background in design and electrical analysis.
+ Solid background in semiconductor fabrication and packaging
+ Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions. - Ability to work ...
Full-time other-general

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