ASIC Design Verification Engineer | UVM | Exp 8+ Years

Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Design, document, and develop ASIC subsystems for release in high volume and quality. Help define the process, methods, and tools for design and implementation of complex developments.

You will contribute to developing Cisco’s product solutions by crafting industry-leading sophisticated chips, with full exposure to all aspects of our systems and applications, including silicon, hardware, software, telemetry, and security.

Specific responsibilities include:
* Architect block, cluster and top-level DV environment infrastructure.
* Develop DV infrastructure from scratch.
* Maintain and improve existing DV environments.
* Develop test plans and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random and ad...