Opportunity Description
CPU Cache Subsystem Senior Design Manager
_corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more
**Advanced**
Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.
_info_outline_
XNote: By applying to this position you will have an opportunity to share your preferred working location from the following: **Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA** .
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
+ 15 years of experience in CPU design, including load-store unit logic/RTL and L2/L3 private/shared caches including micro-architecture definition and PPA processing.
+ Experience leading and managing teams for modern processor subsystems with high speed, lower power design.
+ Experience with...
_corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more
**Advanced**
Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.
_info_outline_
XNote: By applying to this position you will have an opportunity to share your preferred working location from the following: **Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA** .
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
+ 15 years of experience in CPU design, including load-store unit logic/RTL and L2/L3 private/shared caches including micro-architecture definition and PPA processing.
+ Experience leading and managing teams for modern processor subsystems with high speed, lower power design.
+ Experience with...
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