Formal Verification Undergraduate Student (R0)

Applications are invited for an undergraduate student at the Barcelona Supercomputing Center (BSC). BSC is involved in multiple initiatives that involve hardware design. One critical aspect of hardware development is verification of its correct functionality.



While previous and current efforts have focused on simulation-based functional verification, but at BSC we are also establishing a Formal Verification methodology and framework to extend the range and rigour of our verification process for RTL designs. In this internship you will have the opportunity to work in one of the following topics related to formal verification:

* Verify some RTL modules developing assertions for it and setting up formal verification environment and flow.

* Improving the LLM-assisted assertion generation tool by implementing support for an open source tool. For example, right now the tool is designed to work wi...