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Analog SerDes/PLL Circuit Design Engineer

MediaTek

Hsinchu City, Taiwan Province, Taiwan Full-time June 07, 2026
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Opportunity Description

Job DescriptionHigh speed analog SerDes/PLL circuit design
Work Location:HsinChu/ChuPei/Taipei/Tainan

#LI-DC3RequirementBe familiar with high speed analog SerDes circuit design, like CTLE, CDR, DFE, PLL and TX Driver
Full-time Engineers

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