Design Verification Lead, Silicon

Hi, Opening for Soc verification with RISC V - Bangalore Must have a solid understanding of SoC verification flows and experience with SoC verification in multiple clients.
- Should be an independent learner with experience in developing C-based tests for ARC/ARM/RISC-based SoCs.
- Requires a good understanding of SV, UVM test benches, and experience with protocols such as APB, AXI, I2C, UART, PCIe, or DDR.
- Should be able to take the SoC verification test bench and port it for FPGA RTL verification and maintain the test bench for FPGA-RTL.
- Must possess strong debugging skills in SoC Verification.
- Candidates should have 5-8 years of relevant experience Please do share your resume to [email protected] or refer friends. Regards, Jaya