Hardware Validation Lead Engineer

Rambus

Aix-en-Provence, Provence-Alpes-Côte d'Azur, France Full-time May 26, 2026

Opportunity Description

Responsibilities

Define reference design / example architectures to best demonstrate features of Rambus PCIe / CXL controller IP

Develop (Verilog) these designs

Perform simulation with various simulators

Perform FPGA synthesis implementation flow

Perform timing closure

Manage SLR crossing

Perform HW Test and debug on cutting edge platforms

Integration of Real Time Operating Systems on FPGA/SOC CPUs (Versal Premium)

Development (RTL, Hardware, software) of innovative demos and represent Rambus on Tradeshows

Qualifications

Bac +4/+5 or more in Electrical science, Computer science or equivalent.

5+ years of experience with RTL Design in FPGA and hardware integration

Good English skills, communication skills, and willingness to work with an international team.

Additional Desirable skills

RTL Simulation : Questa / VCS / NCSIM

Full-time Engineers

Submit your application for Hardware Validation Lead Engineer at Rambus

Location Aix-en-Provence, Provence-Alpes-Côte d'Azur

Country France

Type Full-time

Category Engineers

Posted May 26, 2026

Deadline July 05, 2026