Hybrid ASIC Verification Engineer – SystemVerilog & UVM

A leading technology firm in Oulu, Finland, is seeking an ASIC Verification Engineer to support Mixed-Signal ASIC verification for consumer applications. Responsibilities include developing verification environments and applying advanced verification methods. The ideal candidate has experience with SystemVerilog, UVM, and holds a degree in electrical engineering or computer science. A hybrid work option is available after coordination with management.
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