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Lead Design Engineer

Cadence Design Systems, Inc.

Shanghai, Shanghai, China Full time June 06, 2026
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Opportunity Description

Description

:
  • Deliver/implement DDR/HBM IP. The engineer should be able to act as a strong team member and contributor. Exercise judgment within generally defined practices and policies.

    • Specific duties include:

  • Proficiency in logic design, simulation
  • Proficiency in Verilog and its simulation environment
  • Good knowledge of IC design
  • At least seven year experience working on digital IC development projects, excellent communication skills and the uncanny ability to both lead and contribute in a cooperative team environment.

    • Position Requirements:

  • Essential Qualifications: Must have BS degree with 6~10+ years of applicable experience, MS degree with 3~7+ years of applicable experience in electrical engineering, microelectronics, comparable engineering science or solid state physics.
  • Essential that the individual demonstrates strong communication, verbal and written.

    •  Requires good com...

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    Opportunity Details

    Location Shanghai, Shanghai
    Country China
    Type Full time
    Category Engineers
    Posted June 06, 2026
    Deadline July 16, 2026

    About Cadence Design Systems, Inc.

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    Cadence Design Systems, Inc.

    Shanghai, China

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