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Pre-Silicon SV-UVM SOC Verification Engineer

MaxLinear

singapore, singapore, Singapore Full-time June 02, 2026
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Opportunity Description

A global semiconductor company in Singapore is seeking a SOC Verification Engineer to join its VLSI group. This role involves the pre-silicon RTL verification of blocks and SOCs, development of testbenches in SV-UVM, and collaboration with cross-functional teams. Ideal candidates should have a strong background in Front End Verification, programming skills in C/C++, and a Bachelor's in Electronics Engineering or equivalent experience. The company values innovation and teamwork, welcoming fresh graduates to apply.
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Full-time Other-General

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