Senior DFT Engineer: Lead ASIC Test & DFT Innovation

A leading semiconductor firm in Cavite City is seeking a Senior DFT Engineer to develop DFT specifications and support product lines with high coverage and low power. The ideal candidate should have 6-8 years of experience in ASIC/SoC DFT, expert knowledge of DFT architecture, and hands-on experience with Tessent DFT tools. Responsibilities include mentoring junior members and delivering high-quality ATPG patterns. This role offers a dynamic work environment and opportunities for innovation.
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