Senior Engineer - Yield Enhancement & Defect Reduction

Vanguard International Semiconductor Singapore Pte. Ltd. seeks experienced engineers to supervise manufacturing operations and conduct defect analysis in a dynamic semiconductor environment. Candidates should have a Master's or Degree in relevant engineering fields and 2-8 years of fab experience.

Responsibilities include training engineers, maintaining quality standards, and driving continuous improvement in defect reduction. Strong leadership and communication skills are essential for success in this role.