Lead Physical Design Engineer – EM/IR Signoff

Lead Physical Design Engineer – EM/IR Signoff
Location:

Bengaluru
Experience:

6–10 Years
Role Overview
We are looking for

Lead Physical Design Engineer

with deep expertise in

EM/IR analysis and signoff

for advanced-node SoC designs. The ideal candidate will drive power integrity closure, identify reliability risks, and collaborate across implementation, package, and technology teams to achieve first-pass silicon success.
Key Responsibilities
Lead

EM/IR analysis, debugging, and closure

for complex SoC/block-level designs.
Perform static and dynamic IR-drop analysis and electromigration signoff across advanced technology nodes.
Develop and optimize

power grid architectures , power delivery networks (PDN), and decoupling strategies.
Analyze power integrity issues and drive fixes through floorplan, placement, routing, and power network enhancements.
Collaborate with Physical Desig...