Senior ASIC Design Verification Engineer

Senior ASIC Design Verification Engineer Responsible for all aspects of digital SoC verification for advanced automotive communication semiconductors and systems. Work with architects, designers, and software engineers to plan and execute verification and validation, contributing to a positive, trusting, and cohesive working environment based on integrity and strong work ethics.

Key Qualifications

BS and/or MS in Electrical Engineering, Computer Science, or related field

Minimum 10+ years of ASIC verification experience

Strong understanding of ASIC verification fundamentals and industry standard methodologies

Experience with Verilog/SystemVerilog, UVM, Python, TCL, C/C++

Experience with the full verification flow, from spec to coverage analysis to gate level simulation

Debugging failures in simulation to root cause problems

Self‑motivated and able to work effectively both independently and in a team

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