Opportunity Description
Job Responsibilities
- Define, architect and document the Design-for-Testability (DfT) concept for SOC’s
- Develop, implement and verify DFT measures
- Work closely with cross-function teams (design/verification, physical, and operation) to ensure all test requirements are met and DFT function is correctly implemented for effective DFT solutions
- Achieve target structural test coverage for logic, memories, serdeses and other mixed signal IPs
- Test pattern generation / verification / post silicon ATE support
- Master's or Bachelor Degree in Electronics and Communications Engineering or equivalent
- About 3 years of working experience in DFT field
- Good knowledge in Boundary Scan, ATPG Scan, and MBIST is a must
- Working experience in industry standard tools like TestKompress, DFT advisor, DFT Compiler
- Knowledge of design flow
- Knowledge in high level ...
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