Opportunity Description
Become a Senior Engineer in Mixed-Signal Verification at Synopsys, where you will lead the verification of critical SERDES IP. Collaborate globally to advance silicon technologies in a supportive setting. This engineering role not only demands technical expertise but also encourages mentorship and collaboration with diverse teams. Your responsibilities will include developing robust verification methodologies and debugging complex interactions between analog and digital systems. Drive quality in high-performance connectivity solutions. Key Responsibilities
Deliver comprehensive verification strategies for SERDES IP Enhance and maintain verification test environments using UVM Diagnose and fix functional issues in mixed-signal domains Conduct electromigration and stress evaluations Collaborate with global teams to deliver exceptional IP Requirements
Bachelor’s or master’s degree in electrical engineering Solid foundation in analog circuit design and verification Famili...
Deliver comprehensive verification strategies for SERDES IP Enhance and maintain verification test environments using UVM Diagnose and fix functional issues in mixed-signal domains Conduct electromigration and stress evaluations Collaborate with global teams to deliver exceptional IP Requirements
Bachelor’s or master’s degree in electrical engineering Solid foundation in analog circuit design and verification Famili...
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