Senior IP Design Engineer - FPGA Safety Lead

Lattice Semiconductor is seeking a qualified candidate in George Town, Penang, for a role focused on the design and development of Lattice Foundation IP. The successful applicant will lead safety qualification research and collaborate closely with cross-functional teams to manage the IP release cycle.

Candidates should hold a Bachelor’s or Master’s degree in relevant fields, boasting over 8 years of experience in SoC and FPGA development. Responsibilities include aligning product features with safety requirements and conducting thorough testing and validation.