Senior Verification Engineer — Shape the Future with SV-UVM

Infineon Technologies AG is seeking a Senior Verification Engineer for their R&D team in Bristol. In this role, you will develop and maintain System Verilog - UVM test benches, contribute to functional coverage models, and assist in debugging processes.

The ideal candidate holds a Bachelor’s degree in Electrical/Electronic Engineering and has 1-2 years of relevant experience. Fluency in English and a collaborative mindset are essential for success in this diverse workplace.