Opportunity Description
We are seeking an experienced **Staff ASIC Verification Engineer** to join our dynamic team. As a verification engineer, you will play a crucial role in ensuring the quality and reliability of our cutting-edge semiconductor designs. If you thrive in a collaborative environment and have a passion for solving complex challenges, this role is for you.
**Responsibilities:**
1. **Verification Planning and Execution** :
2. Develop and execute comprehensive verification plans.
3. Close verification with coverage closure, ensuring high-quality results.
4. Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.
5. **Testbench Development** :
6. Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
7. Implement reusable Verification IP (VIP) components.
8. Collaborate with third-party VIP ...
**Responsibilities:**
1. **Verification Planning and Execution** :
2. Develop and execute comprehensive verification plans.
3. Close verification with coverage closure, ensuring high-quality results.
4. Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.
5. **Testbench Development** :
6. Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
7. Implement reusable Verification IP (VIP) components.
8. Collaborate with third-party VIP ...
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